Silicon Labs /EFR32MG24A020F1024IM40 /TIMER3_S /CC1_CTRL

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Interpret as CC1_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OUTINV)OUTINV 0 (NONE)CMOA 0 (NONE)COFOA 0 (NONE)CUFOA 0 (RISING)ICEDGE 0 (EVERYEDGE)ICEVCTRL

ICEDGE=RISING, ICEVCTRL=EVERYEDGE, COFOA=NONE, CMOA=NONE, CUFOA=NONE

Description

No Description

Fields

OUTINV

Output Invert

CMOA

Compare Match Output Action

0 (NONE): No action on compare match

1 (TOGGLE): Toggle output on compare match

2 (CLEAR): Clear output on compare match

3 (SET): Set output on compare match

COFOA

Counter Overflow Output Action

0 (NONE): No action on counter overflow

1 (TOGGLE): Toggle output on counter overflow

2 (CLEAR): Clear output on counter overflow

3 (SET): Set output on counter overflow

CUFOA

Counter Underflow Output Action

0 (NONE): No action on counter underflow

1 (TOGGLE): Toggle output on counter underflow

2 (CLEAR): Clear output on counter underflow

3 (SET): Set output on counter underflow

ICEDGE

Input Capture Edge Select

0 (RISING): Rising edges detected

1 (FALLING): Falling edges detected

2 (BOTH): Both edges detected

3 (NONE): No edge detection, signal is left as it is

ICEVCTRL

Input Capture Event Control

0 (EVERYEDGE): PRS output pulse and interrupt flag set on every capture

1 (EVERYSECONDEDGE): PRS output pulse and interrupt flag set on every second capture

2 (RISING): PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH)

3 (FALLING): PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH)

Links

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